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Digital-frequency-meter
- 这是应用VHDL语言在FPGA实现对频率进行分频的整个工程-This is the application of VHDL language in the FPGA implementation of the frequency divider of the whole project
Final
- A "Tank Duel" game based on FPG, developmented in VHDL. -- Final Project in ASIC & FPGA Design class -A "Tank Duel" game based on FPG, developmented in VHDL.-- Final Project in ASIC & FPGA Design class
DS18b20
- VHDL FPGA 温度传感器D18B20驱动程序 带工程文件 下载可以直接使用-VHDL FPGA temperature sensor D18B20 driver with a project file can be downloaded directly use
VHDLproject-by-Qian-Yu
- 创建一个实时的视频处理器采用了FPGA技术的系统设计与VHDL。在这个项目中，我们实现滑动窗口滤波器，Sobel算子，一系列传感器和数字显示器VGA模块。-create a real-time video processor using FPGA technology in the course System Design with VHDL. In the project we implement modules for sliding window, sobel lter, a ran
I2C_i2c
- fpga例程：用fpga实现i2c串口通讯的vhdl详细代码，完整的quartus工程，可直接用-fpga routines: i2c serial communication with fpga implementation details of vhdl code, complete quartus project, can be directly used
lab2parte1
- We want to show the values set through the switches SW8-1 on the 7-segment display and HEX0 Hex1. Values are denoted SW4 and SW8-5-one, shown in Hex1 and diplays HEX0, respectively. Your circuit must be able to show the digits 0
NAND_flash_verilog_vhdl
- 很好的NAND Flash 硬件驱动语言，支持VHDL和verilog 语言方便移植，如果有想用FPGA直接驱动NAND flash而又不知如何下手的朋友肯定喜欢。- NAND Flash Controller Reference Design =============================================================================== File List 1.
Cyclone4_115_TV
- 基于Altera cyclone4_115芯片下的完整VGA端口开发工程，包括VHDL源文件，和项目工程文件，对于FPGA下的VGA端口开发很有参考价值。-Based on Altera cyclone4_115 chip under full VGA port development projects, including the VHDL source files, and project files, the VGA port for FPGA development of great r
FPGA_Project1
- 利用VHDL语言编写的FPGA工程文件，包含原理图和各个模块-FPGA using VHDL language project files, including schematics and each module
audioVHDL
- FPGA_Audio - project to implement and demonstrate audio on FPGA Using VHDL
spi_verilog_master_slave_latest.tar
- 该项目从需要具有强大而简单的以VHDL编写的SPI接口核心开始，用于通用的FPGA到设备接口。 所产生的内核产生小而高效的电路，从非常慢的SPI时钟到超过50MHz的SPI时钟。-This project started the need to have robust yet simple SPI interface cores written in VHDL to use in generic FPGA-to-device interfacing. The resulting co
VmodCAM_Ref_HD Demo_13
- This project has dependencies in the 'digilent' VHDL library. For your convenience a local copy of these dependencies are included in the remote_sources directory. The VmodCAM_Ref_HD demo project was built around an Atlys+VmodCAM setup. The proj